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Memory Performance of Prolog Architectures

von Evan Tick
'The Springer International Series in Engineering and Computer Science'. 1988. Auflage. Book. Sprache:…
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One suspects that the people who use computers for their livelihood are growing more "sophisticated" as the field of computer science evolves. This view might be defended by the expanding use of languages such as C and Lisp in contrast to the languag… weiterlesen
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Titel: Memory Performance of Prolog Architectures
Autor/en: Evan Tick

ISBN: 0898382548
EAN: 9780898382549
'The Springer International Series in Engineering and Computer Science'.
1988. Auflage.
Book.
Sprache: Englisch.
Springer US

31. Dezember 1987 - gebunden - 258 Seiten

Beschreibung

One suspects that the people who use computers for their livelihood are growing more "sophisticated" as the field of computer science evolves. This view might be defended by the expanding use of languages such as C and Lisp in contrast to the languages such as FORTRAN and COBOL. This hypothesis is false however - computer languages are not like natural languages where successive generations stick with the language of their ancestors. Computer programmers do not grow more sophisticated - programmers simply take the time to muddle through the increasingly complex language semantics in an attempt to write useful programs. Of course, these programmers are "sophisticated" in the same sense as are hackers of MockLisp, PostScript, and Tex - highly specialized and tedious languages. It is quite frustrating how this myth of sophistication is propagated by some industries, universities, and government agencies. When I was an undergraduate at MIT, I distinctly remember the convoluted questions on exams concerning dynamic scoping in Lisp - the emphasis was placed solely on a "hacker's" view of computation, i. e. , the control and manipulation of storage cells. No consideration was given to the logical structure of programs. Within the past five years, Ada and Common Lisp have become programming language standards, despite their complexity (note that dynamic scoping was dropped even from Common Lisp). Of course, most industries' selection of programming languages are primarily driven by the requirement for compatibility (with previous software) and performance.

Inhaltsverzeichnis

1. Introduction.
- 1.1. What is Prolog?.
- 1.2. Why Prolog?.
- 1.2.1. Reduced Instruction Set Architectures.
- 1.2.2. Parallel Logic Programming Languages.
- 1.2.3. Lisp.
- 1.3. Previous Work.
- 1.3.1. Architectures.
- 1.3.2. Benchmarking.
- 1.3.3. Memory Organization.
- 1.4. Book Outline.
- 2. Prolog Architectures.
- 2.1. Canonical Prolog Architectures.
- 2.1.1. CIF Data Encoding.
- 2.1.2. Naive and Traditional Prolog CIFs.
- 2.1.3. Register-Based CIF.
- 2.1.4. Other CIF Metrics: Stability.
- 2.1.5. Summary.
- 2.2. Environment Stacking Architectures.
- 2.2.1. DEC-10 Prolog Abstract Machine.
- 2.2.2. Warren Abstract Machine.
- 2.2.3. Comparison Between Prolog-10 and WAM.
- 2.2.4. Lcode Architecture.
- 2.3. Restricted AND-Parallel Prolog Architecture.
- 2.4. Summary.
- 3. Prolog Architecture Measurements.
- 3.1. Methodology.
- 3.1.1. Compiler.
- 3.1.2. Assembler.
- 3.1.3. Emulator.
- 3.1.4. Simulators.
- 3.2. Benchmarks.
- 3.3. WAM Referencing Characteristics.
- 3.3.1. Data Referencing.
- 3.3.2. Instruction Referencing.
- 3.4. CIF Referencing Characteristics.
- 3.5. PWAM Referencing Characteristics.
- 3.6. Summary.
- 4. Uniprocessor Memory Organizations.
- 4.1. Memory Model.
- 4.2. Data Referencing.
- 4.2.1. Choice Point Buffer.
- 4.2.2. Stack Buffer.
- 4.2.3. Environment Stack Buffer.
- 4.2.4. Copyback Cache.
- 4.2.5. Smart Cache.
- 4.2.6. Comparison of Data Memories.
- 4.3. Instruction Referencing.
- 4.3.1. Instruction Buffer.
- 4.3.2. Instruction Caches.
- 4.4. Local Memory Configurations.
- 4.5. Main Memory Design.
- 4.5.1. General Queueing Model.
- 4.5.2. Memory Bus Model.
- 4.5.3. Copyback I/D Cache System.
- 4.5.4. Stack and Instruction Buffer System.
- 4.6. Summary.
- 5. Multiprocessor Memory Organizations.
- 5.1. Memory Model.
- 5.2. The Consistency Problem.
- 5.2.1. Broadcast Cache Coherency.
- 5.2.2. Locking in Broadcast Caches.
- 5.2.3. Hybrid Cache Coherency.
- 5.3. Coherent Cache Measurements.
- 5.4. Shared Memory Design.
- 5.4.1. Shared Memory and Bus Queueing Models.
- 5.4.2. Measurements.
- 5.5. Summary.
- 6. Conclusions and Future Research.
- 6.1. Conclusions.
- 6.2. Future Research.-
Appendix A. Glossary of Notation.-
Appendix B. Lcode Instruction Set Summary.-
Appendix C Local Memory Management Algorithms.- References.
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