This book focuses on source-to-source code transformations that remove addressing-related overhead present in most multimedia or signal processing application programs. This approach is complementary to existing compiler technology. What is particularly attractive about the transformation flow pre sented here is that its behavior is nearly independent of the target processor platform and the underlying compiler. Hence, the different source code trans formations developed here lead to impressive performance improvements on most existing processor architecture styles, ranging from RISCs like ARM7 or MIPS over Superscalars like Intel-Pentium, PowerPC, DEC-Alpha, Sun and HP, to VLIW DSPs like TI C6x and Philips TriMedia. The source code did not have to be modified between processors to obtain these results. Apart from the performance improvements, the estimated energy is also significantly reduced for a given application run. These results were not obtained for academic codes but for realistic and rep resentative applications, all selected from the multimedia domain. That shows the industrial relevance and importance of this research. At the same time, the scientific novelty and quality of the contributions have lead to several excellent papers that have been published in internationally renowned conferences like e. g. DATE. This book is hence of interest for academic researchers, both because of the overall description of the methodology and related work context and for the detailed descriptions of the compilation techniques and algorithms.
Inhaltsverzeichnis
1. Introduction. - 2. Existing Code Optimization Techniques. - 3. Fundamental Concepts for Optimization and Evaluation. - 4. Intermediate Representations. - 5. Loop Nest Splitting. - 6. Advanced Code Hoisting. - 7. Ring Buffer Replacement. - 8. Summary and Conclusions. - Appendices Experimental Comparison of SUIF and IR-C /LANCE. - Benchmarking Data for Loop Nest Splitting. - B. 1 Values of performance-monitoring Counters. - B. 1. 1 Intel Pentium III. - B. 1. 2 Sun UltraSPARC III. - B. 1. 3 MIPS R10000. - B. 2 Execution Times and Code Sizes. - B. 3 Energy Consumption of an ARM7TDMI Core. - B. 4 Combined Data Partitioning and Loop Nest Splitting. - B. 4. 1 Execution Times and Code Sizes. - B. 4. 2 Energy Consumption. - Benchmarking Data for Advanced Code Hoisting. - C. 1 Values of performance-monitoring Counters. - C. 1. 1 Intel Pentium III 201 C. 1. 2 Sun UltraSPARC III. - C. 1. 3 MIPS R10000. - C. 2 Execution Times and Code Sizes. - C. 3 Energy Consumption of an ARM7TDMI Core. - Benchmarking Data for Ring Buffer Replacement. - D. 1 Values of performance-monitoring Counters. - D. 1. 1 Intel Pentium III. - D. 1. 2 Sun UltraSPARC III. - D. 1. 3 MIPS R10000. - D. 2 Execution Times and Code Sizes. - D. 3 Energy Consumption of an ARM7TDMI Core. - References. - About the Authors.
