Network processors are the basic building blocks of today's high-speed, high-demand, quality-oriented communication networks. Designing and implementing network processors requires a new programming paradigm and an in-depth understanding of network processing requirements. This book leads the reader through the requirements and the underlying theory of networks, network processing, and network processors. It covers implementation of network processors and intergrates EZchip Microcode Development Environment so that you can gain hands-on experience in writing high-speed networking applications. By the end of the book, the reader will be able to write and test applications on a simulated network processor.
- Comprehensive, theoretical, and pracitical coverage of networks and high-speed networking applications
- Descirbes contemporary core, metro, and access networks and their processing algorithms
- Covers network processor architectures and programming models, enabling readers to assess the optimal network processor typer and configuration for their application
- Free download from http://www. cse. bgu. ac. il/npbook includes microcode development tools that provide hands-on experience with programming a network processor
Inhaltsverzeichnis
1;Cover Page;1 2;Network Processors;2 3;Copyright Page;5 4;Table of Contents;8 5;Preface;12 6;Chapter 1. Introduction and Motivation;14 6.1;1.1 Network Processors Ecosystem;14 6.2;1.2 Communication Systems and Applications;15 6.3;1.3 Network Elements;19 6.4;1.4 Network Processors;21 6.5;1.5 Structure of This Book;23 6.6;1.6 Summary;25 7;Part 1. Networks;26 7.1;Chapter 2. Networking Fundamentals;28 7.1.1;2.1 Introduction;29 7.1.2;2.2 Networks Primer;30 7.1.3;2.3 Data Networking Models;34 7.1.4;2.4 Basic Network Technologies;38 7.1.5;2.5 Telecom Networks;39 7.1.6;2.6 Data Networks;51 7.1.7;2.7 Summary;82 7.1.8;Appendix A: Registration Protocols;83 7.1.9;Appendix B: Spanning Tree Protocols;85 7.2;Chapter 3. Converged Networks;90 7.2.1;3.1 Introduction;90 7.2.2;3.2 From Telecom Networks to Data Networks;91 7.2.3;3.3 From Datacom to Telecom;100 7.2.4;3.4 Summary;147 7.2.5;Appendix A: Routing Information Distribution Protocols;148 7.3;Chapter 4. Access and Home Networks;162 7.3.1;4.1 Access Networks;162 7.3.2;4.2 Home and Building Networks;191 7.3.3;4.3 Summary;193 8;Part 2. Processing;194 8.1;Chapter 5. Packet Processing;196 8.1.1;5.1 Introduction and Definitions;196 8.1.2;5.2 Ingress and Egress;199 8.1.3;5.3 Framing;201 8.1.4;5.4 Parsing and Classification;208 8.1.5;5.5 Search, Lookup, and Forwarding;218 8.1.6;5.6 Modification;249 8.1.7;5.7 Compression and Encryption;250 8.1.8;5.8 Queueing and Traffic Management;251 8.1.9;5.9 Summary;252 8.2;Chapter 6. Packet Flow Handling;254 8.2.1;6.1 Definitions;255 8.2.2;6.2 Quality of Service;256 8.2.3;6.3 Class of Service;257 8.2.4;6.4 QoS Mechanisms;262 8.2.5;6.5 Summary;299 8.3;Chapter 7. Architecture;300 8.3.1;7.1 Introduction;300 8.3.2;7.2 Background and Definitions;302 8.3.3;7.3 Equipment Design Alternatives: ASICS Versus NP;321 8.3.4;7.4 Network Processors Basic Architectures;322 8.3.5;7.5 Instruction Set (Scalability; Processing Speed);327 8.3.6;7.6 NP Components;327 8.3.7;7.7 Summary;348 8.4;Chapter 8. Software;350 8.4.1;8
.1 Introduction;351 8.4.2;8.2 Conventional Systems;355 8.4.3;8.3 Programming Models Classification;361 8.4.4;8.4 Parallel Programming;362 8.4.5;8.5 Pipelining;368 8.4.6;8.6 Network Processor Programming;372 8.4.7;8.7 Summary;376 8.4.8;Appendix A: Parsing and Classification Languages;377 8.4.9;Appendix B: Click and NP-Click Language and Programming Model;384 8.4.10;Appendix C: PPL Language and Programming Model;390 8.5;Chapter 9. NP Peripherals;392 8.5.1;9.1 Switch Fabrics;392 8.5.2;9.2 Coprocessors;416 8.5.3;9.3 Summary;420 9;Part 3. A Network Processor: EZchip;422 9.1;Chapter 10. EZchip Architecture, Capabilities, and Applications;424 9.1.1;10.1 General Description;424 9.1.2;10.2 System Architecture;426 9.1.3;10.3 Lookup Structures;432 9.1.4;10.4 Counters, Statistics and Rate Control;434 9.1.5;10.5 Traffic Management;437 9.1.6;10.6 Stateful Classification;438 9.1.7;10.7 Multicast Frames;438 9.1.8;10.8 Data Flow;439 9.1.9;10.9 Summary;451 9.2;Chapter 11. EZchip Programming;452 9.2.1;11.1 Instruction Pipeline;453 9.2.2;11.2 Writing NP Microcode;456 9.2.3;11.3 Preprocessor Overview;460 9.2.4;11.4 Developing and Running NP Applications;460 9.2.5;11.5 Top Common Commands;462 9.2.6;11.6 Summary;470 9.2.7;Appendix A: Preprocessor Commands;471 9.3;Chapter 12. Parsing;474 9.3.1;12.1 Internal Engine Diagram;474 9.3.2;12.2 Topparse Registers;478 9.3.3;12.3 Topparse Structures;482 9.3.4;12.4 Topparse Instruction Set;482 9.3.5;12.5 Example;487 9.3.6;12.6 Summary;491 9.3.7;Appendix A: Detailed Register Description;492 9.3.8;Appendix B: Topparse Addressing Modes;499 9.3.9;Appendix C: Topparse Detailed Instruction Set;500 9.4;Chapter 13. Searching;514 9.4.1;13.1 Introduction;514 9.4.2;13.2 Internal Engine Diagram;515 9.4.3;13.3 Topsearch I Structures;518 9.4.4;13.4 Interface to Topparse (Input to Topsearch);519 9.4.5;13.5 Interface to Topresolve (Output of Topsearch);522 9.4.6;13.6 Hash Table Learning;524 9.4.7;13.7 Example;526 9.4.8;13.8 Summary;529 9.5;Chapter 14. Resolving;530
9.5.1;14.1 Internal Engine Diagram;530 9.5.2;14.2 Topresolve Registers;534 9.5.3;14.3 Topresolve Structures;539 9.5.4;14.4 Topresolve Instruction Set;540 9.5.5;14.5 Example;544 9.5.6;14.6 Summary;549 9.5.7;Appendix A: Detailed Register Description;550 9.5.8;Appendix B: Topresolve Addressing Modes;557 9.5.9;Appendix C: Topresolve Detailed Instruction Set;559 9.6;Chapter 15. Modifying;574 9.6.1;15.1 Introduction;574 9.6.2;15.2 Internal Engine Diagram;576 9.6.3;15.3 Topmodify Registers;579 9.6.4;15.4 Topmodify Structures;583 9.6.5;15.5 Topmodify Instruction Set;584 9.6.6;15.6 Example;587 9.6.7;15.7 Summary;596 9.6.8;Appendix A: Detailed Register Description;597 9.6.9;Appendix B: Topmodify Addressing Modes;604 9.6.10;Appendix C: Topmodify Detailed Instruction Set;605 9.7;Chapter 16. Running the Virtual Local Area Network Example;616 9.7.1;16.1 Installation;616 9.7.2;16.2 Getting Started;617 9.7.3;16.3 Microcode Development Workflow;620 9.7.4;16.4 Summary;628 9.8;Chapter 17. Writing Your First High-Speed Network Application;630 9.8.1;17.1 Introduction;630 9.8.2;17.2 Data Flow and Top Microcode;631 9.8.3;17.3 Data Structures;661 9.8.4;17.4 Summary;667 10;List of Acronyms;668 11;References;686 12;Index;708
