Neuro-inspired Computing Using Resistive Synaptic Devices

Chapter1: Introduction to Neuro-Inspired Computing using Resistive Synaptic Devices. - Part I: Device-level Demonstrations of Resistive Synaptic Devices. - Chapter2: Phase Change Memory based Synaptic Devices. - Chapter3: Pr0. 7Ca0. 3MnO3 (PCMO) based Synaptic Devices. - Chapter4: TaOx/TiO2 based Synaptic Devices. - Part II: Array-level Demonstrations of Resistive Synaptic Devices and Neural Networks. - Chapter5: Training and Inference in Hopfield Network using 10×10 Phase Change Synaptic Array. - Chapter6: Experimental Demonstration of Firing-Rate Neural Networks based on Metal-Oxide Memristive Crossbars. - Chapter7: Weight Tuning of Resistive Synaptic Devices and Convolution Kernel Operation on 12×12 Cross-Point Array. - Chapter8: Spiking Neural Network with 256×256 PCM Array. - Part III: Circuit, Architecture and Algorithm-level Design of Resistive Synaptic Devices based Neuromorphic System. - Chapter9: Peripheral Circuit Design Considerations of Neuro-inspired Architectures. - Chapter10: Processing-in-Memory Architecture Design for Accelerating Neuro-Inspired Algorithms. - Chapter11: Multi-layer Perceptron Algorithm: Impact of Non-Ideal Conductance and Area-Efficient Peripheral Circuits. - Chapter12: Impact of Non-Ideal Resistive Synaptic Device Behaviors on Implementation of Sparse Coding Algorithm. - Chapter13: Binary OxRAM/CBRAM Memories for Efficient Implementations of Embedded Neuromorphic Circuits.