The Ethernet MAC (Media Access Control), sublevel inside the Data Link Layer of the OSI orientation model. This core is designed for implementation of CSMA/CD LAN in accordance with the IEEE 802. 3 standards. Ethernet IP Core is capable of operating at 10 or 100 Mbps for Ethernet and fast Ethernet applications. The MAC is the portion of Ethernet core that handles the CSMA/CD protocol for transmission and reception of frames. It performs Frame Data Encapsulation and Den capsulation, Frame Transmission, and Frame Reception. It is the endeavor of this project to demonstrate a practical implementation of the 8b/10b Encoder/Decoder used for Gigabit Ethernet. VHDL has been used to declare the specifications of the Transmitter and Receiver. Xilinx Corporation's Xilinx ver4. 1i, which has an in built VHDL Compiler and synthesizer and Modelsim ver5. 5b for seeing simulation results, was used for the purpose.
